From ff69cfae11e410b20f1f9384735e889fc5cb6fac Mon Sep 17 00:00:00 2001 From: shockrahwow Date: Wed, 3 Oct 2018 00:33:41 -0700 Subject: [PATCH] shuffling file names around --- cst337/lec/lec10.md | 62 +++++++++---------- cst337/lec/lec11.md | 41 ------------- cst337/lec/lec8.md | 118 ++++++++++++++++++++++++++++++++++++ cst337/lec/lec9.md | 143 ++++++++++++-------------------------------- 4 files changed, 182 insertions(+), 182 deletions(-) delete mode 100644 cst337/lec/lec11.md create mode 100644 cst337/lec/lec8.md diff --git a/cst337/lec/lec10.md b/cst337/lec/lec10.md index ddcefca..5425808 100644 --- a/cst337/lec/lec10.md +++ b/cst337/lec/lec10.md @@ -1,49 +1,41 @@ -# lec10 +# lec11 -## Half-adder +At this point I'l mention that just reading isn't going to get you anywhere, you have to try things, and give it a real earnest attempt. -This will be the building block for adding bit-strings together later on however, for now we are going to just add two singular bits. -To accomplish this we'll build a half adder. +__ALU:__ Arithmetic Logic Unit -This means our logic circuit must adhere to the following logic table. -If both inputs are 0 then our result is 0 and we don't have to carry anything out. -If only one input A/B is 1 then our result will clearly be 1 and our carry will be 0. -Finally if both inputs are 0 then since we can't fit 2 in a single bit it means we have to carry-out a 1, and our result will be 0. +## Building a 1-bit ALU -With all of this in mind we have a table to guide how we will implement our logic circuit. -I __highly__ suggest that you try to build a logic circuit on your own first as most of the content is best learned through practice. +![fig0](../img/alu.png) -| A | B | Carry-out | Result | -|---|---|---|---| -| 0 | 0 | 0 | 0 | -| 0 | 1 | 0 | 1 | -| 1 | 0 | 0 | 1 | -| 1 | 1 | 1 | 0 | +First we'll create an example _ALU_ which implements choosing between an `and`, `or`, `xor`, or `add`. +Whether or not our amazing _ALU_ is useful doesn't matter so we'll go one function at a time(besides `and/or`). -![fig0](../img/fig0lec10.png) +First recognize that we need to choose between `and` or `or` against our two inputs A/B. +This means we have two inputs and/or, and we need to select between them. +_Try to do this on your own first!_ -## Full Adder +![fig1](../mg/fig1llec11.png) -If we only want to add single-bit's then a half-adder works fine but if we want to add multiple bits say `1011 + 0010` then we need to consider that we will likely have to chain these together. -The full-adder has 1 main difference from the half-adder, it has 3 inputs, 2 main inputs and 1 input for the carry bit. -The carry bit will propagate along the operation now if we chain these together, _just like real addition!_ +Next we'll add on the `xor`. +AGAIN: try to do this on your own, the main hint I'll give here is: the current mux needs to be changed. -![fig1](../img/fig1lec10.png) +![fig2](../img/fig2lec11.png) -With this we can start chaining together multiple Full-adders we can start adding multiple bits at the same time since the carry now propagates along the chain. +Finally we'll add the ability to add and subtract. +You may have also noted that we can subtract two things to see if they are the same dhowever, we can also `not` the result of the `xor` and get the same result. -## Ripple Adders +![fig3](../img/fig3lec11.png) -An N-bit adder is really just made up of Full adders chained together. -Each adder is chained to the next by the carry-out line which then acts as the next adder's carry-in line. -If we have say a 4-bit ripple adder, then each bit in the bit strings will go to a different adder. -For now the initial carry in bit will be fed a 0 everytime. +At this point our _ALU_ can `and`, `or`, `xor`, and `add`/`sub`. +The mux will choose one which logic block to use; the carry-in line will tell the `add` logic block whether to add or subtract. +Finally the A-invert and B-invert line allow us to determine if we want to invert either A or B (inputs). -![fig2](../img/fig2lec10.png) +## N-bit ALU -Here we see that our 4-bit input A & B have the values `1111` & `0000` respectively. -The 0th bit goes to Adder0, the 1th goes to Adder1, and so on. -You should have also noticed that each one also takes a carry-in, which for now is 0 but it does mean we have to let the comutation happen one adder at a time. -None of the sequential adders can do anything if the previous have done anything yet either. -At the end of it all we get some bit results, and a carry-out. -We can then simply reassemble the results back into one bit-string to assemble our final result. +For sanity we'll use the following block for our new ALU. + +![fig4](../img/fig4lec11.png) + +Note that we are chaining the carry-in's to the carry-out's just like a ripple adder. +also each ALU just works with `1` bit from our given 4-bit input. diff --git a/cst337/lec/lec11.md b/cst337/lec/lec11.md deleted file mode 100644 index 5425808..0000000 --- a/cst337/lec/lec11.md +++ /dev/null @@ -1,41 +0,0 @@ -# lec11 - -At this point I'l mention that just reading isn't going to get you anywhere, you have to try things, and give it a real earnest attempt. - -__ALU:__ Arithmetic Logic Unit - -## Building a 1-bit ALU - -![fig0](../img/alu.png) - -First we'll create an example _ALU_ which implements choosing between an `and`, `or`, `xor`, or `add`. -Whether or not our amazing _ALU_ is useful doesn't matter so we'll go one function at a time(besides `and/or`). - -First recognize that we need to choose between `and` or `or` against our two inputs A/B. -This means we have two inputs and/or, and we need to select between them. -_Try to do this on your own first!_ - -![fig1](../mg/fig1llec11.png) - -Next we'll add on the `xor`. -AGAIN: try to do this on your own, the main hint I'll give here is: the current mux needs to be changed. - -![fig2](../img/fig2lec11.png) - -Finally we'll add the ability to add and subtract. -You may have also noted that we can subtract two things to see if they are the same dhowever, we can also `not` the result of the `xor` and get the same result. - -![fig3](../img/fig3lec11.png) - -At this point our _ALU_ can `and`, `or`, `xor`, and `add`/`sub`. -The mux will choose one which logic block to use; the carry-in line will tell the `add` logic block whether to add or subtract. -Finally the A-invert and B-invert line allow us to determine if we want to invert either A or B (inputs). - -## N-bit ALU - -For sanity we'll use the following block for our new ALU. - -![fig4](../img/fig4lec11.png) - -Note that we are chaining the carry-in's to the carry-out's just like a ripple adder. -also each ALU just works with `1` bit from our given 4-bit input. diff --git a/cst337/lec/lec8.md b/cst337/lec/lec8.md new file mode 100644 index 0000000..ab9fcf4 --- /dev/null +++ b/cst337/lec/lec8.md @@ -0,0 +1,118 @@ +# lec9 + +This lecture has a corresponding activity found in `lab/` it is called `combinational-logic.md`. +It is more useful to practice combinational logic as opposed to read about it so the sub section here will be minimal in information. +It's recommended that you try as many of the problems in the activity until you understand the concept, _don't bother doing them all_. + +## Combinational Logic + +### OR + +`a+b` is equivalent to saying `a` or `b`. + +### AND + +`ab` is equivalent to saying `a` and `b`. + +Note that this syntax is simlar to multiplication so `a*b` is equivalent to the above. + +### NOT + +`!a` is equivalent to saying not `a`. +We can also denote it with a bar over the expression we want to _not_. + +![Figure-Not](../img/not.png) + +### Big AND + +Behavior is the same as an `and` but instead of two inputs we can have many more inputs. +It will only ever return a 1 if all inputs are 1. + +### Big OR + +Again we are mimicing the behvior of the normal or gate but this time we can have multiple inputs as opposed to just two. +If only one of the many inputs is 1 then we return a 1 for the output of the Big OR. + +## Decoders + +Here we'll learn by doing + +``` +Selector = 2 Bits +Output = 4 Bits +``` +As a challenge you can try using the combinational logic gates from above to try and tackle this yourself + +|s1 |s2 |o3 |o2 |o1 |o0 | +|---|---|---|---|---|---| +| 0 | 0 | 0 | 0 | 0 | 1 | +| 0 | 1 | 0 | 0 | 1 | 0 | +| 1 | 0 | 0 | 1 | 0 | 0 | +| 1 | 1 | 1 | 0 | 0 | 0 | + + +## Multiplexor + +Typically we'll refer to multiplexors by their size. + +> what does it do? + +It takes a signal as `2^n` inputs and out puts out `n` signals as output. + +Example: We have a selector(s0), two inputs[in0 & in1], and one output `out`. +The selector will select an input and we will generate some output in `out`. + +|s0 | i1 | i0 | out| +|---|---|---|---| +|0 | 0 | 0 | 0| +|0 | 0 | 1 | 1| +|0 | 1 | 0 | 0| +|0 | 1 | 1 | 1| +|1 | 0 | 0 | 0| +|1 | 0 | 1 | 0| +|1 | 1 | 0 | 1| +|1 | 1 | 1 | 1| + + +This ultimately lets us pick data out of memory given some address. + +## Half Adder + +For now we'll take two inputs and get 1 output, with a carry-output. + +Let's add 2 bits + +|a |b |out| +|---|---|---| +|0 |0 |0 | +|0 |1 |1 | +|1 |0 |1 | +|1 |1 |0 | + +What about the carry bit however? What would _it_ look like given the preivous operations? + +|a |b |carryout| +|---|---|---| +|0 |0 |0 | +|0 |1 |0 | +|1 |0 |0 | +|1 |1 |1 | + +Before what this implies note that the result of the carryout resembles + +## Full Adder + +Two inputs, One output, One carry-out, One carry-in + +Here we'll add up `a & b`(inputs) and `c` carry-in + +|c|a|b |output| +|---|---|---|---| +|0|0|0 |0| +|0|0|1 |1| +|0|1|0 |1| +|0|1|1 |0| +|1|0|0 |1| +|1|0|1 |0| +|1|1|0 |0| +|1|1|1 |1| diff --git a/cst337/lec/lec9.md b/cst337/lec/lec9.md index ab9fcf4..ddcefca 100644 --- a/cst337/lec/lec9.md +++ b/cst337/lec/lec9.md @@ -1,118 +1,49 @@ -# lec9 +# lec10 -This lecture has a corresponding activity found in `lab/` it is called `combinational-logic.md`. -It is more useful to practice combinational logic as opposed to read about it so the sub section here will be minimal in information. -It's recommended that you try as many of the problems in the activity until you understand the concept, _don't bother doing them all_. +## Half-adder -## Combinational Logic +This will be the building block for adding bit-strings together later on however, for now we are going to just add two singular bits. +To accomplish this we'll build a half adder. -### OR +This means our logic circuit must adhere to the following logic table. +If both inputs are 0 then our result is 0 and we don't have to carry anything out. +If only one input A/B is 1 then our result will clearly be 1 and our carry will be 0. +Finally if both inputs are 0 then since we can't fit 2 in a single bit it means we have to carry-out a 1, and our result will be 0. -`a+b` is equivalent to saying `a` or `b`. +With all of this in mind we have a table to guide how we will implement our logic circuit. +I __highly__ suggest that you try to build a logic circuit on your own first as most of the content is best learned through practice. -### AND - -`ab` is equivalent to saying `a` and `b`. - -Note that this syntax is simlar to multiplication so `a*b` is equivalent to the above. - -### NOT - -`!a` is equivalent to saying not `a`. -We can also denote it with a bar over the expression we want to _not_. - -![Figure-Not](../img/not.png) - -### Big AND - -Behavior is the same as an `and` but instead of two inputs we can have many more inputs. -It will only ever return a 1 if all inputs are 1. - -### Big OR - -Again we are mimicing the behvior of the normal or gate but this time we can have multiple inputs as opposed to just two. -If only one of the many inputs is 1 then we return a 1 for the output of the Big OR. - -## Decoders - -Here we'll learn by doing - -``` -Selector = 2 Bits -Output = 4 Bits -``` -As a challenge you can try using the combinational logic gates from above to try and tackle this yourself - -|s1 |s2 |o3 |o2 |o1 |o0 | -|---|---|---|---|---|---| -| 0 | 0 | 0 | 0 | 0 | 1 | -| 0 | 1 | 0 | 0 | 1 | 0 | -| 1 | 0 | 0 | 1 | 0 | 0 | -| 1 | 1 | 1 | 0 | 0 | 0 | - - -## Multiplexor - -Typically we'll refer to multiplexors by their size. - -> what does it do? - -It takes a signal as `2^n` inputs and out puts out `n` signals as output. - -Example: We have a selector(s0), two inputs[in0 & in1], and one output `out`. -The selector will select an input and we will generate some output in `out`. - -|s0 | i1 | i0 | out| +| A | B | Carry-out | Result | |---|---|---|---| -|0 | 0 | 0 | 0| -|0 | 0 | 1 | 1| -|0 | 1 | 0 | 0| -|0 | 1 | 1 | 1| -|1 | 0 | 0 | 0| -|1 | 0 | 1 | 0| -|1 | 1 | 0 | 1| -|1 | 1 | 1 | 1| +| 0 | 0 | 0 | 0 | +| 0 | 1 | 0 | 1 | +| 1 | 0 | 0 | 1 | +| 1 | 1 | 1 | 0 | - -This ultimately lets us pick data out of memory given some address. - -## Half Adder - -For now we'll take two inputs and get 1 output, with a carry-output. - -Let's add 2 bits - -|a |b |out| -|---|---|---| -|0 |0 |0 | -|0 |1 |1 | -|1 |0 |1 | -|1 |1 |0 | - -What about the carry bit however? What would _it_ look like given the preivous operations? - -|a |b |carryout| -|---|---|---| -|0 |0 |0 | -|0 |1 |0 | -|1 |0 |0 | -|1 |1 |1 | - -Before what this implies note that the result of the carryout resembles +![fig0](../img/fig0lec10.png) ## Full Adder -Two inputs, One output, One carry-out, One carry-in +If we only want to add single-bit's then a half-adder works fine but if we want to add multiple bits say `1011 + 0010` then we need to consider that we will likely have to chain these together. +The full-adder has 1 main difference from the half-adder, it has 3 inputs, 2 main inputs and 1 input for the carry bit. +The carry bit will propagate along the operation now if we chain these together, _just like real addition!_ -Here we'll add up `a & b`(inputs) and `c` carry-in +![fig1](../img/fig1lec10.png) -|c|a|b |output| -|---|---|---|---| -|0|0|0 |0| -|0|0|1 |1| -|0|1|0 |1| -|0|1|1 |0| -|1|0|0 |1| -|1|0|1 |0| -|1|1|0 |0| -|1|1|1 |1| +With this we can start chaining together multiple Full-adders we can start adding multiple bits at the same time since the carry now propagates along the chain. + +## Ripple Adders + +An N-bit adder is really just made up of Full adders chained together. +Each adder is chained to the next by the carry-out line which then acts as the next adder's carry-in line. +If we have say a 4-bit ripple adder, then each bit in the bit strings will go to a different adder. +For now the initial carry in bit will be fed a 0 everytime. + +![fig2](../img/fig2lec10.png) + +Here we see that our 4-bit input A & B have the values `1111` & `0000` respectively. +The 0th bit goes to Adder0, the 1th goes to Adder1, and so on. +You should have also noticed that each one also takes a carry-in, which for now is 0 but it does mean we have to let the comutation happen one adder at a time. +None of the sequential adders can do anything if the previous have done anything yet either. +At the end of it all we get some bit results, and a carry-out. +We can then simply reassemble the results back into one bit-string to assemble our final result.