irq's functions registered

This commit is contained in:
shockrah 2019-11-09 00:31:19 -08:00
parent 9f5fdeafcf
commit 6d1204f957
2 changed files with 60 additions and 19 deletions

View File

@ -13,13 +13,14 @@ extern interrupt_handler
extern cpu_reg_state
extern stack_state
extern idt_ptr
extern irq_handler
global load_idt
load_idt:
lidt [idt_ptr]
ret
%macro irq_handler 2
%macro irq 2
global irq_handler_%1
irq_handler_%1:
push dword 0
@ -151,19 +152,19 @@ common_irq_handler:
; Remapped IRQ's for the APIC
# starting from irq 0 -> 15 but remapped to 32 -> 47
irq_handler 0, 32
irq_handler 1, 33
irq_handler 2, 34
irq_handler 3, 35
irq_handler 4, 36
irq_handler 5, 37
irq_handler 6, 38
irq_handler 7, 39
irq_handler 8, 40
irq_handler 9, 41
irq_handler 10, 42
irq_handler 11, 43
irq_handler 12, 44
irq_handler 13, 45
irq_handler 14, 46
irq_handler 15, 47
irq 0, 32
irq 1, 33
irq 2, 34
irq 3, 35
irq 4, 36
irq 5, 37
irq 6, 38
irq 7, 39
irq 8, 40
irq 9, 41
irq 10, 42
irq 11, 43
irq 12, 44
irq 13, 45
irq 14, 46
irq 15, 47

View File

@ -3,6 +3,7 @@
#include "serial.h"
#include "mem.h"
#include "types.h"
#include "ports.h"
const char* err_msg[] = {
"Divide by zero\n",
@ -83,6 +84,8 @@ extern void irq_handler_13();
extern void irq_handler_14();
extern void irq_handler_15();
void* irq_handlers[16];
void setup_idt_entry(u32 t_idx, u32 base, u16 sel, u8 type_attrs) {
// Configuring a single given entry in the IDT table
IDT[t_idx].offset_low = (base & 0xffff);
@ -110,11 +113,16 @@ void interrupt_handler(struct cpu_reg_state* cpu) {
printf(err_msg[cpu->int_no]);
}
for(;;);
//serial_pic_ack(cpu->int_no);
return;
}
void irq_handler() {
// Pass the index into the table and the handler(strut* cpu_reg_state)
void init_irq_handler(u32 irq, void (*handler)(struct cpu_reg_state* cpu)) {
// install handle
irq_handlers[irq] = handler;
}
void irq_handler(struct cpu_reg_state* cpu) {
}
void init_idt() {
@ -164,4 +172,36 @@ void init_idt() {
// Load IDT with all the new information in place, ready to use
load_idt();
// clear table in case there's garbage in there
memset((u8*)irq_handlers, 0, sizeof(void*));
// Remap irq's to proper location
serialport_write_byte(0x20, 0x11);
serialport_write_byte(0xA0, 0x11);
serialport_write_byte(0x21, 0x20);
serialport_write_byte(0xA1, 0x28);
serialport_write_byte(0x21, 0x04);
serialport_write_byte(0xA1, 0x02);
serialport_write_byte(0x21, 0x01);
serialport_write_byte(0xA1, 0x01);
serialport_write_byte(0x21, 0x0);
serialport_write_byte(0xA1, 0x0);
// Install handlers for irq's
setup_idt_entry(32,(u32)irq_handler_0,0x08, 0x8e);
setup_idt_entry(33,(u32)irq_handler_1,0x08, 0x8e);
setup_idt_entry(34,(u32)irq_handler_2,0x08, 0x8e);
setup_idt_entry(35,(u32)irq_handler_3,0x08, 0x8e);
setup_idt_entry(36,(u32)irq_handler_4,0x08, 0x8e);
setup_idt_entry(37,(u32)irq_handler_5,0x08, 0x8e);
setup_idt_entry(38,(u32)irq_handler_6,0x08, 0x8e);
setup_idt_entry(39,(u32)irq_handler_7,0x08, 0x8e);
setup_idt_entry(40,(u32)irq_handler_8,0x08, 0x8e);
setup_idt_entry(41,(u32)irq_handler_9,0x08, 0x8e);
setup_idt_entry(42,(u32)irq_handler_10,0x08, 0x8e);
setup_idt_entry(43,(u32)irq_handler_11,0x08, 0x8e);
setup_idt_entry(44,(u32)irq_handler_12,0x08, 0x8e);
setup_idt_entry(45,(u32)irq_handler_13,0x08, 0x8e);
setup_idt_entry(46,(u32)irq_handler_14,0x08, 0x8e);
setup_idt_entry(47,(u32)irq_handler_15,0x08, 0x8e);
}